Intel® Core™ Processor (Series 3)
Formerly known as Wildcat Lake, Datasheet, Volume 1 of 2
| ID | Date | Version | Classification |
|---|---|---|---|
| 913965 | 05/19/2026 | 001 | Public |
Legal Disclaimer
Revision History
Introduction
Processor and Device IDs
Package Mechanical Specifications
Memory Mapping
Security Technologies
Intel Virtualization Technology
Instructions Set Enhancements
Intel® Neural Processing Unit (Intel® NPU)
Audio Voice and Speech
Power Management
Power Delivery
Thermal Management
System Clocks
Real Time Clock (RTC)
Memory
USB Type-C Sub System
Universal Serial Bus (USB)
PCI Express (PCIe)
Universal Flash Storage
Graphics
Display
Processor Sideband Signals
General Purpose Input and Output
Interrupt Timer Subsystem (ITSS)
Intel® Serial IO Inter-Integrated Circuit (I2C) Controllers
Intel® Serial IO Improved Inter-Integrated Circuit (I3C) Controllers
Gigabit Ethernet Controller
Connectivity Integrated (CNVi)
Controller Link
Integrated Sensor Hub (ISH)
System Management Interface and SMLink
Host System Management Bus (SMBus) Controller
Serial Peripheral Interface (SPI)
Enhanced Serial Peripheral Interface (eSPI)
Intel® Serial IO Generic SPI (GSPI) Controllers
Touch Host Controller (THC)
Intel® Serial IO Universal Asynchronous ReceiverTransmitter (UART) Controlle
Private Configuration Space Port ID
Testability and Monitoring
Security Technologies
Intel® Converged Boot Guard and TXT
Crypto Acceleration Instructions
Intel® Secure Key
Execute Disable Bit
Intel® Supervisor Mode Execution Protection (Intel® SMEP)
Intel® Supervisor Mode Access Protection (Intel® SMAP)
User Mode Instruction Prevention (UMIP)
Read Processor ID (RDPID)
Intel® System Resources Defense and Intel® System Security Report
Intel® Total Memory Encryption - Multi-Key
Control-flow Enforcement Technology (Intel® CET)
BIOS Guard
Intel® Platform Trust Technology
Linear Address Space Separation (LASS)
Intel® Total Storage Encryption (Intel® TSE)
Security Firmware Engines
Audio Voice and Speech
Intel® High Definition Audio (Intel® HD Audio) Controller Capabilities
Audio DSP Capabilities
Intel® High Definition Audio Interface Capabilities
Direct Attached Digital Microphone (PDM) Interface
USB Audio Offload Support
I2S PCM Interface
Intel® Display Audio Interface
MIPI® SoundWire Interface
Signal Description
Integrated Pull-Ups and Pull-Downs
IO Signal Planes and States
Power and Performance Technologies
Intel® Thread Director
Intel® Smart Cache Technology
P-core LP E-core Level 0, Level 1 and Level 2 Caches
Ring Interconnect
Intel® Hybrid Technology
Intel® Turbo Boost Technology 2.0
Intel® Adaptive Boost Technology
Intel System Agent Enhanced SpeedStep ® Technology
Enhanced Intel SpeedStep® Technology
Intel® Speed Shift Technology
Intel® Advanced Vector Extensions 2 (Intel® AVX2)
Intel® 64 Architecture x2APIC
Intel® Dynamic Tuning Technology (Intel® DTT)
Cache Line Write Back (CLWB)
User Mode Wait Instructions
Thermal Management Features
Skin Temperature Control (STC)
Adaptive Thermal Monitor
Digital Thermal Sensor
FORCEPR# Signal
FORCEPR Demotion
Voltage Regulator Protection using FORCEPR#
Thermal Solution Design and FORCEPR Behavior
Low-Power States and FORCEPR Behavior
THERMTRIP Signal
Critical Temperature Detection
System Memory Interface
Processor SKU Support Matrix
Supported Memory Modules and Devices
System Memory Timing Support
Memory Controller (MC)
System Memory Frequency
Technology Enhancements of Intel® Fast Memory Access (Intel® FMA)
Data Scrambling
Data Swapping
LPDDR5x CMDADD Ascending and Descending
DDR IO Interleaving
DRAM Clock Generation
DRAM Reference Voltage Generation
Data Swizzling
Error Correction With Standard RAM
Post Package Repair (PPR)
RFM
In-Memory Analytics Accelerator
Assured Power Modes
With cTDP, the processor is now capable of altering the maximum sustained power with an alternate processor IA core base frequency. Assured Power allows operation in situations where extra cooling is available or situations where a cooler and quieter mode of operation is desired.
cTDP consists of three modes as shown in the following table.
| SOC Power Characteristic | Description of Characteristic | SOC Design Considerations |
|---|---|---|
| Maximum Turbo Power | The maximum sustained (>1s) power dissipation of the processor as limited by current and/or temperature controls. Instantaneous power may exceed Maximum Turbo Power for short durations (<=10ms). Maximum Turbo Power is configurable by system vendor and can be system specific. | Intel performance advocacy for power delivery and transient thermal solution design (PL2) |
| Base Power | The time-averaged power dissipation that the processor is validated to not exceed during manufacturing while executing an Intel-specified high complexity workload at Base Frequency and at the operating temperature as specified in the | Intel reference performance advocacy for sustained thermal solution design (PL1) |
| Minimum Assured Power | Min Assured Power is a performance advocacy determined by running a complex scenario defined by Intel. Every product SKU stack has guidance on Min Assured Power for thermal chassis design. Represents Intel specified min PL1 that needs to be taken for thermal design to get the advocated performance experience. Min Assured Power is the performance vs power cross-over point across the product SKU stack. | Intel minimum performance advocacy for sustained thermal solution design (PL1) |
| High Concurrency Power | High Concurrency Power is a functional characteristic determined by running a complex scenario defined by Intel. Every SoC consumes a minimum power during a max connected case. This is a functional characteristic, not intended to indicate performance floor. Scenario takes into consideration IO ports, compute IPs concurrency (CPU, GPU, IPU) along with memory BW. Temperature assumption of spec limit. Manufacturing screening is done to exclude parts that don't meet the target power for the high concurrency scenario. The SoC may not honor PL1 values set lower than high concurrency power during the high concurrency scenario. | Thermal solution capability required to support the high concurrency scenario as described |
In each mode, the Intel® Turbo Boost Technology 2.0 power limits are reprogrammed along with a new OS controlled frequency range. The Intel Dynamic Tuning driver assists in Processor Base Power operation by adjusting processor PL1 dynamically. The cTDP mode does not change the maximum per-processor IA core turbo frequency.