Intel® Core™ Processor (Series 3)

Formerly known as Wildcat Lake, Datasheet, Volume 1 of 2

ID Date Version Classification
913965 05/19/2026 001 Public
Document Table of Contents
RFM

SRAM

The local SRAM is used for ISH FW code storage and to read/write operational data. The local SRAM block includes both the physical SRAM as well as the controller logic. The SRAM is a total of 640 KB organized into banks of 32 KB each and is 32-bit wide. The SRAM is shared with Intel® CSME as shareable memory. To protect against memory errors, the SRAM includes ECC support. The ECC mechanism is able to detect multi-bit errors and correct for single bit errors. The ISH firmware has the ability to put unused SRAM banks into lower power states to reduce power consumption.