Intel® Core™ Processor (Series 3)

Formerly known as Wildcat Lake, Datasheet, Volume 1 of 2

ID Date Version Classification
913965 05/19/2026 001 Public
Document Table of Contents
RFM

Intel System Agent Enhanced SpeedStep ® Technology

Intel® System Agent Enhanced SpeedStep® Technology

Intel® System Agent consists of multiple IPs each providing dynamic voltage and frequency scaling capabilities. Intel SOCs scale voltage and frequency of the fabric and memory subsystem based on bandwidth demands and latency sensitivity of the workloads running on the SoCs.

Memory Geyserville (Memory GV): Memory subsystem provides four operating points for optimal memory subsystem power management. Memory GV targets memory controller and Memory PHY optimization by dynamically adjusting DDR data rates during light workload conditions when enabled. It also adjusts the memory subsystem operating points based on system power modes (such as best performance vs low battery modes).

Memory Training and Initialization:  /MRC (Memory Reference Code) performs DDR training at maximum, mid, and minimum frequencies to establish optimal I/O and timing parameters for each operating point. To achieve optimal performance and memory power levels, the memory initialization and training process during first system boot, after CMOS clear, or following updates requires extended time compared to typical boot sequences. A black screen may be observed during this initialization and training process. Additional information on memory initialization processes is available in industry standard JEDEC Specifications at www.JEDEC.org.

Dynamic Frequency Scaling Operation:

 Before changing DDR data rates, the processor places DDR memory into self-refresh mode and adjusts the necessary timing and voltage parameters to ensure stable operation at the new frequency, providing seamless transitions between memory performance states based on system workload demands.