Intel® Core™ Processor (Series 3)

Formerly known as Wildcat Lake, Datasheet, Volume 1 of 2

ID Date Version Classification
913965 05/19/2026 001 Public
Document Table of Contents
RFM

SAGV Points

Refer to Intel System Agent Enhanced SpeedStep ® Technology for more details

SA Speed Enhanced Speed Steps (SA-GV) and Gear Mode Frequencies

Processor

Technology

Rank Config

DDR Maximum Rate [MT/s]

SAGV-LowBW

SAGV-MedBW

SAGV-HighBW

SAGV- High Performance

all LPDDR5x Type 3 1R/2R 6800 2400 G4 4800 G4 6000 G4 6800 G4
DDR5 1R/2R 6400 3200 G4 4800 G4 6000 G4 6400 G4
Notes:
  1. Wildcat Lake supports dynamic gearing technology where the Memory Controller can run at 1:2 (Gear-2 mode) or 1:4 (Gear-4 mode) ratio of DRAM speed. The gear ratio is the ratio of DRAM speed to Memory Controller Clock .

    MC Channel Width equal to DDR Channel width multiply by Gear Ratio.

  2. SA-GV modes:
    1. LowBW- Low frequency point, Minimum Power point. Characterized by low power, low BW, high latency. The system will stay at this point during low to moderate BW consumption.
    2. MedBW - Tuned for balance between power & performance.
    3. HighBW - Characterized by high power, low latency, moderate BW also used as RFI mitigation point.
    4. MaxBW/Lowest latency Lowest Latency point, peak BW and highest power.

DDR Frequency Shifting

DDR interfaces emit electromagnetic radiation which can couple to the antennas of various radios that are integrated in the system, and cause radio frequency interference (RFI). The DDR Radio Frequency Interference Mitigation (DDR RFIM) feature is primarily aimed at resolving narrowband RFI from DDR5 andLPDDR5/x technologies for the Wi-Fi* high and ultra-high bands (~5-7 GHz) . By changing the DDR data rate, the harmonics of the clock can be shifted out of a radio band of interest, thus mitigating RFI to that radio. This feature is working with SAGV on, the 3rd SAGV point is used as RFI mitigation point