CLKOUT_​P0

CLKOUT_​P1

CLKOUT_​P2

CLKOUT_​P3

CLKOUT_​P4

CLKOUT_​P5

CLKOUT_​N0

CLKOUT_​N1

CLKOUT_​N2

CLKOUT_​N3

CLKOUT_​N4

CLKOUT_​N5

O

Yes

PCI Express* Clock Output: Serial Reference 100 MHz PCIe* specification compliant differential output clocks to PCIe devices.

CLKOUT_​P/N[5:0]= Can be used for PCIe Gen1, Gen2, Gen3, and Gen4 support.

GPP_​C09/SRCCLKREQ0#

GPP_​C10/SRCCLKREQ1#

GPP_​C11/SRCCLKREQ2#

GPP_​C12/SRCCLKREQ3#

GPP_​C13/SRCCLKREQ4#

GPP_​C14/SRCCLKREQ5#

GPP_​D21/UFS_​REFCLK

IOD

Clock Request: Serial Reference Clock request signals for PCIe* 100 MHz differential clocks

The SRCCLKREQ*# signals can be configured to map to any of the PCD PCI Express* Root Ports while using any of the PCD CLKOUT differential pairs.

XTAL_​IN

I

Crystal Input: Input connection for 38.4 MHz crystal to Processor.

XTAL_​OUT

O

Crystal Output: Output connection for 38.4 MHz crystal to Processor.

CLK_​S_​RCOMP

Analog

Differential Clock Bias Reference: Used to set BIAS reference for differential clocks