31:20

0h

RO/V

WOPCM Base LSB (WOPCMBASE_​LSB)

Base value programmed (from Top of Stolen Memory). The programmed value must be consistent with the WOPCM Size programming.

19:14

0h

RO

Reserved

13:11

4h

RO/V

SA MEDIA WOPCM SIZE (SAM_​WOPCMSIZE)

This register determines the WOPCM size. The programmed value must be consistent with the WOPCM base programming.
00b: 1MB (default)
01b: 2MB
10b: 4MB
11b: 8MB

10:7

0h

RO

Reserved

6

1h

RO/V

KCR RESET FIX (KCR_​RESET_​FIX)

0: Disable KCR Reset Fix 1: KCR reset fix is enabled by default

5

0h

RO/V

VDBOX RESET COUNTER CHECKIN DISABLE (vdboxResetCounterCheckinDisable)

vdbox Reset Counter Checkin Disable. 0: Enable feature: KCR will check in encryption counters from ECR on engine reset irrespective of Reset DCN feature state. 1: Disable feature: KCR will check in encryption counters from ECR on engine reset only when Reset DCN is enabled.

4

0h

RO/V

Override Terminate Attack (OVTATTACK)

Override of unsolicited connection state attack and terminate
0: Disable override; attack terminate allowed
1: Enable override; attack terminate disallowed

3

0h

RO/V

SPARE_​3 (SPARE_​3)

Spare

2

0h

RO/V

Lock Bit (LOCK)

BIOS will set this bit with bit 0 and/or bit 1.

1

0h

RO/V

PAVP Enable (PAVPE)

0: PAVP functionality disabled
1: PAVP functionality enabled

0

0h

RO/V

PCM Enable (PCME)

Protected content memory enable.