Intel® Core™ Ultra 200V Series Processors CFG and MEM Registers
| ID | Date | Version | Classification |
|---|---|---|---|
| 831649 | 03/30/2026 | 001 | Public |
ISYS Control (ISYS_CONTROL_0_0_0_MCHBAR) – Offset 5e90
ISYS Control
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 63:48 | 0h | RO | Reserved |
| 47 | 0h | RW | (ISYS_CURRENT_LIMIT_L2_ENABLE) This bits enables disables ISYS_CURRENT_LIMIT_L2 algorithem |
| 46:32 | 0h | RW | (ISYS_CURRENT_LIMIT_L2) This field indicated the current limitiation of L2. Units of measurements are 1/8 A. |
| 31:23 | 0h | RO | Reserved |
| 22:16 | 0h | RW | (ISYS_CURRRENT_L1_TAU) Specifies the time window used to calculate average current for ISYS_L1. |
| 15 | 0h | RW | (ISYS_CURRENT_LIMIT_L1_ENABLE) This bits enables disables ISYS_CURRENT_LIMIT_L1 algorithem. |
| 14:0 | 0h | RW | (ISYS_CURRENT_LIMIT_L1) This field indicated the current limitiation of L1. Units of measurements are 1/8 A. |