31:16

0h

RO

Reserved

15

0h

RW/1C

Pme Status Field (PMESTATUS)

PME Status:
0: Software clears the bit by writing a 1 to it.
1: This bit is set when the AMBA Device would normally assert the PME# signal independent of the state of the PME Enable bit (bit 8 in this register)

14:9

0h

RO

Reserved

8

0h

RW

Pme Enable Field (PMEENABLE)

PME Enable:
1: Enables the function to assert PME#.
0: PME# message on Sideband is disabled.

7:4

0h

RO

Reserved

3

1h

RO

No Soft Reset Field (NO_​SOFT_​RESET)

This bit indicates that devices transitioning from D3hot to D0 because of Powerstate commands do not perform an internal reset

2

0h

RO

Reserved

1:0

0h

RW

Power State Field (POWERSTATE)

Power State: This field is used both to determine the current power state and to set a new power state