Intel® Core™ Ultra 200V Series Processors

Datasheet, Volume 1 of 2

ID Date Version Classification
829568 05/27/2025 004 Confidential
Document Table of Contents

Private Configuration Space Port ID

The Processor incorporates a wide variety of devices and functions. The registers within these devices are mainly accessed through the primary interface, such as PCI configuration space and IO/MMIO space. Some devices also have registers that are distributed within the Processor Private Configuration Space at individual endpoints (Target Port IDs) which are only accessible through the Processor Sideband Interface. These Processor Private Configuration Space Registers can be addressed via SBREG_​BAR or through SBI Index Data pair programming.

Private Configuration Space Register Target Port IDs

Processor Device/Function Type

Target Port ID (hex)

General Purpose I/O (GPIO) Community 0

70

General Purpose I/O (GPIO) Community 1

71

General Purpose I/O (GPIO) Community 3

73

General Purpose I/O (GPIO) Community 4

74

General Purpose I/O (GPIO) Community 5 75

PCIe Controller #1 (SPA)

01

PCIe Controller #2 (SPB)

02

eSPI / SPI

6D

CNVi

2A

ISH Controller

D0

USB

09

UART, I2C, GSPI

33

Integrated Clock Controller (ICC)

62
GbE 2D
Real Time Clock (Host) 6C