Intel® Core™ Ultra Series 3 Processors CFG and MEM Registers
| ID | Date | Version | Classification |
|---|---|---|---|
| 872351 | 04/14/2026 | 001 | Public |
Command Status (CMDSTATUS) – Offset a8
The Command Status register indicates the status of the last command submitted to the Command register. The Active field indicates that a command is in progress. The Active field is set to 1 when a command is written to the Command register. While the Active field is 1, the values of the other fields are unspecified. When the command completes, the Active field is set to 0 and the other fields of this register indicate whether the command completed successfully.
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 31 | 0h | RO/V | CMDSTATUS Active (ACTIVE) See register EAS reference |
| 30:24 | 0h | RO | Reserved |
| 23:8 | 0h | RO | Command Result (CMDRES) Command Result |
| 7:0 | 0h | RO/V | Error Code (CODE) Error Code |