Intel® Core™ Ultra Series 3 Processors CFG and MEM Registers
| ID | Date | Version | Classification |
|---|---|---|---|
| 872351 | 04/14/2026 | 001 | Public |
General Status (GENSTS) – Offset 90
General Status
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 31:4 | 0h | RO | Reserved |
| 3:2 | 0h | RO/V | Reset Type Required (RTR) 00: Software can issue a Reset Device command to the Command Register (see #341204 section 9.2.12) to recover the device. |
| 1:0 | 0h | RO/V | Device State (DEVST) 00: Device is Disabled. No work is performed. All ENQ operations return Retry. |