63:9

0h

RO

Reserved

8

0h

RO/V

Pending Bit Array Offset (OFFSET)

MSI-X PBA Offset within BAR indicated by BIR. Entire register is used, masking BIR to form a 32-bit QWORD-aligned offset.

7

0h

RO/V

Pending Bit Array Offset (OFFSET)

MSI-X PBA Offset within BAR indicated by BIR. Entire register is used, masking BIR to form a 32-bit QWORD-aligned offset.

6

0h

RO/V

Pending Bit Array Offset (OFFSET)

MSI-X PBA Offset within BAR indicated by BIR. Entire register is used, masking BIR to form a 32-bit QWORD-aligned offset.

5

0h

RO/V

Pending Bit Array Offset (OFFSET)

MSI-X PBA Offset within BAR indicated by BIR. Entire register is used, masking BIR to form a 32-bit QWORD-aligned offset.

4

0h

RO/V

Pending Bit Array Offset (OFFSET)

MSI-X PBA Offset within BAR indicated by BIR. Entire register is used, masking BIR to form a 32-bit QWORD-aligned offset.

3

0h

RO/V

Pending Bit Array Offset (OFFSET)

MSI-X PBA Offset within BAR indicated by BIR. Entire register is used, masking BIR to form a 32-bit QWORD-aligned offset.

2

0h

RO/V

Pending Bit Array BIR (BIR)

Indicates the BAR used to map the MSI-X PBA into Memory Space. BAR 0 at 10h.

1

0h

RO/V

Pending Bit Array BIR (BIR)

Indicates the BAR used to map the MSI-X PBA into Memory Space. BAR 0 at 10h.

0

0h

RO/V

Pending Bit Array BIR (BIR)

Indicates the BAR used to map the MSI-X PBA into Memory Space. BAR 0 at 10h.