63:60

0h

RO

Reserved

59:32

0h

RW/V/L

CNTRCFG Events (EVENTS)

Specifies the set of events to be monitored by this counter, corresponding to the Event Category selected. The set of supported events depends on the value of Event Category. Unsupported bits are ignored. The definition of some Events in each Event Category may be implementation specific.

31:12

0h

RO

Reserved

11:8

0h

RW/V/L

Event Category (EVNTCAT)

Specifies the Event Category to associate with this counter. Based on the Event Category selected, different sets of events can be selected in the Events field.
Value Event Category
0 WQ
1 Engine
2 Address Translation
3 Operations
4 Completions
5 Inter-Domain Operations
6-15 Reserved

7:3

0h

RO

Reserved

2

0h

RW/V/L

Global Freeze on Overflow (GFOVF)

0: No global freeze.
1: When an overflow is detected from this register, all counters in the device are frozen.
In either case, Overflow status is recorded in the OVFSTATUS register.
This bit is reserved if Counter Freeze Support in PERFCAP is 0.

1

0h

RW/V/L

Interrupt on Overflow (INTOVF)

0: No Interrupt is generated.
1: Generate a Performance monitoring Interrupt when this counter overflows.
This bit is reserved if Interrupt on Overflow Support in PERFCAP is 0.

0

0h

RW/V/L

CNTRCFG Enable (ENABLE)

0: This counter is disabled.
1: This counter is enabled to count events.