Intel® Core™ Ultra 200H and 200U Series Processors

Datasheet, Volume 1 of 2

ID Date Version Classification
842704 05/27/2025 Public
Document Table of Contents

Functional Description

Features Supported

PCIe Controller Feature

Processor-H Controllers

Processor-U Controllers

6

1

2

3

4

5

L1 Sub-States (L1.0, L1.1, L1.2)

Yes

Yes

Yes

Yes

Yes

Yes

L0s Link State (RX/TX)

Yes

Yes

Yes

Yes

Yes

Yes

S4/S5 Sleep States (Sx)

Yes

Yes

Yes

Yes

Yes

Yes

Common Clock Mode

Yes

Yes

Yes

Yes

Yes

Yes

Separate Reference Clock with Independent SSC (SRIS)

Yes

Yes

Yes

Yes

Yes

No

Separate Reference Clock with No SSC (SRNS)

Yes

Yes

Yes

Yes

Yes

No

Precision Time Management (PTM)

Yes

Yes

Yes

Yes

Yes

Yes

Advanced Error Reporting (AER)

Yes

Yes

Yes

Yes

Yes

Yes

End-to-End Lane Reversal

Yes

Yes

Yes

Yes

Yes

Yes

Latency Tolerance Reporting (LTR)

Yes

Yes

Yes

Yes

Yes

Yes

PCIe TX Half Swing

No

No

No

No

No

No

PCIe TX Full Swing

Yes

Yes

Yes

Yes

Yes

Yes

Run Time D3 (RTD3)

Yes

Yes

Yes

Yes

Yes

Yes

RTD3 through PFET_​EN

Yes

Yes

Yes

Yes

Yes

Yes

Access Control Services (ACS)

Yes

Yes

Yes

Yes

Yes

Yes

Alternative Routing-ID Interpretation (ARI)

Yes

Yes

Yes

Yes

Yes

Yes

Port 80h Decode

Yes

Yes

Yes

Yes

Yes

Yes

Lane Polarity Inversion

Yes

Yes

Yes

Yes

Yes

Yes

PCIe Controller Root Port Hot-Plug

Yes

Yes

Yes

Yes

Yes

Yes

Downstream Port Containment (DPC)

No

No

No

No

No

No

Enhanced Downstream Port Containment (eDPC)

No

No

No

No

No

No

Virtual Channel (VC)

0

0

0/1

0/1

0/1

0

NVMe Cycle Router

No

No

No

No

No

No

Volume Management Device (Intel® VMD)

Yes

Yes

Yes

Yes

Yes

Yes

RAID[0] and RAID[1] Mode Support 1,2

Yes

Yes

Yes

Yes

Yes

Yes

RAID[5] Mode Support 3

No

No

No

No

No

No

RAID[10] Mode Support 3

No

No

No

No

No

No

Mammoth Glacier Discrete Device Support

(M.2 1px2, 1px4)

Yes

Yes

Yes

Yes

Yes

Yes

Hybrid Dual Port Module Support (M.2 2px2)

Yes

Yes

No

No

No

No

PCIe Controller (PC) Root Port (RP)

Peer-2-Peer (P2P) Mem Write Transactions

RPs between PC1 and PC2 = No

RPs within PC1 or within PC2 = Yes

RPs between PC1/2 and PC3/4/5/6 = Yes

RPs between PC3/4/5/6 = Yes

PCIe Controller (PC) Root Port (RP)

Peer-2-Peer (P2P) Mem Read Transactions

No

PCIe Controller (PC) Root Port (RP)

Peer-2-Peer (P2P) MCTP VDM Transactions

RPs within PC1 or within PC2 = Yes

RPs between PC1/2/3/4/5/6 = Yes

PCIe Root Port Initiated Dynamic Width Change

No

No

No

No

No

No

PCIe Root Port Initiated Dynamic Speed Change

Yes

Yes

Yes

Yes

Yes

Yes

End Point Device Initiated Dynamic Width Change

Yes

Yes

Yes

Yes

Yes

Yes

End Point Device Initiated Dynamic Speed Change

Yes

Yes

Yes

Yes

Yes

Yes

Notes:
  1. No restrictions on PCIe Controller. PCIe RAID is expected to work across all Root Ports within a PCIe Controller and between Root Ports from different PCIe Controllers.
  2. No RAID support between PCIe and SATA storage devices.
  3. The Intel® Rapid Storage Technology (RST) does not restrict RAID modes so if any unsupported RAID mode is enabled it is up to the motherboard designer to validate any non-supported RAID mode.