MPSUP: Multiprocessor Support

This location contains three bits for representing the supported number of physical processors on the bus. These two bits are LSB aligned where 000b equates to non-scalable 1 socket (1S) operation, 001b to 2 socket (2S), 010b to non-scalable 4 socket (4S), 011 to scalable 4 socket (S4S), and 100 scalable 8 socket (S8S). The 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids is a 1S, 2S, 4S, or 8S processor. The first six bits in this field are reserved for future use. Writes to this register have no effect.

Example: A scalable 8-socket processor will have a value of 100h at offset 5Ah.