Eagle Stream Platform

Data Sheet

ID Date Version Classification
814095 04/04/2025 001 Public
Document Table of Contents

Voltage and Current Specifications

The VCCIN Rail Current and Voltage Specifications for 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids

TDP / PL1 (W) VCCIN_​VID (V) VCCIN_​R_​LL (mΩ) IccIN_​Max (A) IccIN_​Max. app (A) IccIN_​PL1 (A) PMax (W) PMax.app (W) VCCIN 2nd Droop Vmin (V) VCCIN 3rd Droop Vmin (V) VCCIN_​VOvS_​MAX for the First 25 µs (V) Vtrip (V)
85 1.8 0.85 76 66 42 200 184 1.713 1.713 1.872 1.7199
95 1.8 0.85 91 79 48 222 204 1.701 1.701 1.872 1.7089
105 1.8 0.85 106 92 54 244 225 1.688 1.688 1.871 1.6978
125 1.8 0.85 141 119 66 298 267 1.658 1.658 1.870 1.6749
135 1.8 0.85 160 132 72 327 289 1.642 1.642 1.870 1.6638
145 1.8 0.85 180 146 78 358 311 1.625 1.625 1.869 1.6519
150 1.8 0.85 190 153 81 373 323 1.617 1.617 1.869 1.6460
155 1.8 0.85 201 160 84 389 334 1.607 1.607 1.868 1.6400
165 1.8 0.85 222 175 90 422 357 1.589 1.589 1.867 1.6273
185 1.8 0.85 266 204 102 490 405 1.572 1.556 1.866 1.6026
205 1.83 0.85 314 235 113 562 454 1.574 1.556 1.865 1.6063
225 1.83 0.5 364 266 122 638 504 1.626 1.626 1.863 1.6730
250 1.83 0.5 430 307 137 739 570 1.593 1.593 1.861 1.6525
270 1.83 0.5 485 341 149 824 624 1.594 1.576 1.861 1.6355
300 1.83 0.5 550 393 167 922 708 1.598 1.580 1.857 1.6095
330 1.83 0.5 550 430 185 922 764 1.598 1.580 1.855 1.5910
350 1.83 0.5 550 430 198 922 764 1.598 1.580 1.855 1.5910
385 1.83 0.5 550 430 220 922 764 1.598 1.580 1.855 1.5910
4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids + HMB SKUs
330 1.83 0.5 550 430 185 1009 812 1.598 1.580 1.855 1.5910
350 1.83 0.5 550 430 198 1009 812 1.598 1.580 1.855 1.5910
Sapphire Rapids EE SKUs
85 1.8 0.85 76 66 42 200 184 1.713 1.713 1.872 1.7199
95 1.8 0.85 91 79 48 222 204 1.701 1.701 1.872 1.7089
105 1.8 0.85 106 92 54 244 225 1.688 1.688 1.871 1.6978
110 1.8 0.85 119 102 59 265 241 1.677 1.677 1.871 1.6893
120 1.8 0.85 132 112 63 285 257 1.666 1.666 1.870 1.6808
125 1.8 0.85 141 119 66 298 267 1.658 1.658 1.870 1.6749
135 1.8 0.85 160 132 72 327 289 1.642 1.642 1.870 1.6638
140 1.8 0.85 170 139 75 343 300 1.634 1.634 1.869 1.6579
145 1.8 0.85 180 146 78 358 311 1.625 1.625 1.869 1.6519
150 1.8 0.85 190 153 81 373 323 1.617 1.617 1.869 1.6460
155 1.8 0.85 201 160 84 389 334 1.607 1.607 1.868 1.6400
160 1.8 0.85 212 168 87 406 346 1.598 1.598 1.867 1.6332
165 1.8 0.85 222 175 90 422 357 1.589 1.589 1.867 1.6273
185 1.8 0.85 266 204 102 490 405 1.572 1.556 1.866 1.6026
195 1.83 0.85 290 220 108 526 430 1.574 1.556 1.866 1.6190
205 1.83 0.85 314 235 113 562 454 1.574 1.556 1.865 1.6063
215 1.83 0.5 339 251 118 600 479 1.639 1.639 1.864 1.6805
225 1.83 0.5 364 266 122 638 504 1.626 1.626 1.863 1.6730
Sapphire Rapids EE E-Temp SKUs
85 1.8 0.85 87 77 56 210 197 1.704 1.704 1.872 1.7106
95 1.8 0.85 106 93 63 239 219 1.687 1.687 1.871 1.6970
105 1.8 0.85 125 108 70 268 243 1.671 1.671 1.870 1.6842
110 1.8 0.85 140 120 75 291 260 1.659 1.659 1.870 1.6740
120 1.8 0.85 155 132 79 314 277 1.646 1.646 1.870 1.6638
125 1.8 0.85 165 139 83 329 289 1.638 1.638 1.869 1.6579
135 1.8 0.85 186 153 89 361 312 1.620 1.620 1.869 1.6460
140 1.8 0.85 195 160 91 376 324 1.612 1.612 1.868 1.6400
145 1.8 0.85 205 166 95 393 337 1.604 1.604 1.868 1.6349
150 1.8 0.85 215 173 98 409 349 1.595 1.595 1.867 1.6290
155 1.8 0.85 225 180 101 425 361 1.587 1.587 1.867 1.6230
160 1.8 0.85 236 187 104 442 373 1.577 1.577 1.866 1.6171
165 1.8 0.85 246 193 106 458 385 1.569 1.569 1.866 1.6120
185 1.8 0.85 286 216 116 526 435 1.568 1.552 1.865 1.5924
195 1.83 0.85 306 228 121 561 459 1.568 1.552 1.865 1.6122
205 1.83 0.5 343 253 132 596 485 1.636 1.636 1.865 1.6795
215 1.83 0.5 364 264 137 632 510 1.626 1.626 1.864 1.6740
225 1.83 0.5 404 292 148 668 536 1.606 1.606 1.864 1.6600

Power Parameter Definitions

Power Parameter Name

Definition

Notes

TDP Thermal Design Power of the CPU. The target power level CPU thermal solution should be designed to.
PL1 CPU Socket RAPL: Default Package Power Limit 1. The default setting and the upper limit setting= TDP, set in MSR 610h.
VccIN_​VID The Nominal VID During Normal Operation.
VCCIN_​R_​LL DC and AC Load Line, also known as AVP, Required. The Platform R_​LL setting should be based on the highest TDP SKUs supported by the platform.
IccIN_​Max Max Current Corresponds to CPU PMax.
IccIN_​Max.app Current Corresponds to CPU PMax.app.
IccIN_​PL1 Thermal Design Current Corresponds to CPU PL1 default Value.
PMax Instantaneous max CPU package power at virus condition.
PMax.app Instantaneous max CPU package power at the worst case real application condition.
VCCIN 2nd Droop Vmin The minimum Vmin during the rising edge of the transient current up to IccIN_​Max, caused mainly by the Rpath and inductance of socket and board addressed by cavity caps. Required for Fast Vmode validation with the current up to IccIN_​Max.
VCCIN 3rd Droop Vmin The minimum Vmin at IccIN_​Max level, addressed mainly by a mix of board caps in the cavity on top and bottom, the edge caps and VR tuning. Required for Fast Vmode validation with the current up to IccIN_​Max.
VCCIN_​VOvS_​MAX Maximum Overshoot voltage for the first 25 µs due to Load Transient release.

After 25 µs, Vmax should meet AVP regulation (VccIN_​VID-VCCIN_​R_​LL × Current + 22 mV).

Required for Transient 3D validation with the current up to IccIN_​Max.app.
Vtrip (V) The fused PMax Detector Voltage Trip Level. Calculated as: VccIN_​VID-VCCIN_​R_​LL × IccIN_​Max.app - 22 mV - 2 mV.
Notes:
  • All 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids + HBM and 5th Gen Intel® Xeon® Processor Scalable Family, Codename Emerald Rapids SKU numbers listed here were from pre-Si projection and subject to change.
  • The voltage specification requirements are measured across the Gen5 VRTT test points. Voltage measurement should be taken with a DC to 20 MHz bandwidth (BW) oscilloscope limit (or DC to 100 MHz if 20 MHz BW oscilloscopes is not available), using a 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope probe.
  • The processor should not be subjected to any static VCCIN level that exceeds the VCCIN_​MAX (VccIN_​VID-VCCIN_​R_​LL × Current + 22 mV) associated with any particular current. Failure to adhere to this specification can shorten processor lifetime.
  • Minimum VCCIN and maximum ICCIN are specified at the maximum processor case temperature (TCASE). ICCIN_​MAX is specified at the relative VCC_​MIN point on the VCCIN load line.
  • VCCIN has a Vboot setting of 1.8V.

Other Processor Power Rail Current and Voltage Specifications for all 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids

Power Parameters VCCINFAON VCCFA_​EHV VCCFA_​EHV_​FIVRA VCCD_​HV VCCVNN VPP_​HBM 3V3_​AUX
Nominal Voltage = 1.0V 1.8V 1.8V 1.1V 1.0V N/A 3.3V
TDC 42A 5A SPR: 44A

Future drop-in processor: 48A

SPR: 23A

Future Drop-In processor: 26A

0.02A N/A 0.4A
ICCMAX 46A 6.25A SPR: 48Apk

Future drop-in processor: 53Apk

SPR: 25Apk

Future Drop-In processor: 30 Apk

0.02A N/A 0.4A
Vmin measured at VRTT test points 0.930V at 1.0 Vnom 1.749V See Table: VCCFA_​EHV_​FIVRA Voltage Specs Across 4 Quadrants and Remote Sense With Gen5 VRTT Test Points SPR: 1.086V;

Future Drop-In processor: 1.081V

Rpath from VR output inductor to socket pin at the top layer is recommended = 120 mΩ

0.97 Vmin with calculation

N/A 3.205 Vmin with VRTT validation

Rpath at the socket pin is recommended = 83 mΩ.

3.217 Vmin with calculation.

Vmax measured at VRTT test points 1.050V at 1.0 Vnom 1.841V See Table: VCCFA_​EHV_​FIVRA Voltage Specs Across 4 Quadrants and Remote Sense With Gen5 VRTT Test Points SPR: 1.192 V

Future Drop-In processor: 1.189V

Rpath from VR output inductor to socket pin at the top layer is recommended = 120 mΩ

1.03 Vmax with calculation

N/A 3.395 Vmax with VRTT validation

Rpath at the socket pin is recommended = 83 mΩ.

3.383 Vmax with calculation.

4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids + HBM SKUs

Nominal Voltage = 1.0V 1.8V 1.8V 1.1V 1.0V 2.5V 3.3V
TDC 48A 5A 102A 23A 0.02A 4A 0.4A
ICCMAX 53A 6.25A 136A 25A 0.02A 5A 0.4A
Vmin measured at VRTT test points 0.909V at 1.0 Vnom

1.749V See Table: VCCFA_​EHV_​FIVRA Voltage Specs Across 4 Quadrants and Remote Sense With Gen5 VRTT Test Points 1.086V Rpath from VR output inductor to socket pin at the top layer is recommended = 120 mΩ

0.97 Vmin with calculation

2.530V at 2.5 Vnom 3.205 Vmin with VRTT validation.

Rpath at the socket pin is recommended = 83 mΩ.

3.217 Vmin with calculation.

Vmax measured at VRTT test points 1.050V at 1.0 Vnom 1.841V See Table: VCCFA_​EHV_​FIVRA Voltage Specs Across 4 Quadrants and Remote Sense With Gen5 VRTT Test Points 1.192V Rpath from VR output inductor to socket pin at the top layer is recommended = 120 mΩ

1.03 Vmax with calculation

2.708V at 2.5 Vnom 3.395 Vmax with VRTT validation

Rpath at the socket pin is recommended = 83 mΩ.

3.383 Vmax with calculation.

Notes:
  • SPR = 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids.
  • All 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids + HBM and 5th Gen Intel® Xeon® Processor Scalable Family, Codename Emerald Rapids SKU numbers listed here were from pre-Si projection and subject to change.
  • The voltage specification requirements are measured across the Gen5 VRTT test points. Voltage measurement should be taken with a DC to 20 MHz bandwidth (BW) oscilloscope limit (or DC to 100 MHz if 20 MHz BW oscilloscopes is not available), using a 1.5 pF maximum probe capacitance, and 1 MΩ minimum impedance. The maximum length of the ground wire on the probe should be less than 5 mm to ensure external noise from the system is not coupled in the scope probe.
  • PVNN_​MAIN current on CPU side is 20 mA and too small to be tested with the black interposer. Measured the voltage at its VR output side, do Rpath simulation and calculate the Vmax/Vmin per: 1.0×(1+/-DC tolerance%) ±1/2 x Ripple pk-pk - Rpath x 0.02 and Vmax/Vmin spec is 1.03V/0.97V.
  • Vmin and Vmax voltage includes: DC + AC + Ripple.

VCCFA_​EHV_​FIVRA Voltage Specs Across 4 Quadrants and Remote Sense With Gen5 VRTT Test Points

Interposer Rails Vmin Vmax
For 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids Non-HBM SKUs
VCCFA_​EHV_​FIVRA_​NW 1.738V 1.864V
VCCFA_​EHV_​FIVRA_​NE 1.704V 1.857V
VCCFA_​EHV_​FIVRA_​SW 1.729V 1.865V
VCCFA_​EHV_​FIVRA_​SE 1.713V 1.860V
VCCFA_​EHV_​FIVRA_​RS 1.722V 1.862V
For Future Drop-In Non-HBM SKUs
VCCFA_​EHV_​FIVRA_​NW 1.739V 1.871V
VCCFA_​EHV_​FIVRA_​NE 1.702V 1.859V
VCCFA_​EHV_​FIVRA_​SW 1.730V 1.871V
VCCFA_​EHV_​FIVRA_​SE 1.712V 1.864V
VCCFA_​EHV_​FIVRA_​RS 1.720V 1.864V
For 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids + HBM SKUs
VCCFA_​EHV_​FIVRA_​NW 1.663V 1.866V
VCCFA_​EHV_​FIVRA_​NE 1.660V 1.858V
VCCFA_​EHV_​FIVRA_​SW 1.691V 1.844V
VCCFA_​EHV_​FIVRA_​SE 1.685V 1.838V
VCCFA_​EHV_​FIVRA_​RS 1.669V 1.831V
Note:All non-HBM Vmax/Vmin spec data is based on simulation with Fishhawk Falls 12L board and reduced caps, and all numbers listed here were from pre-Si projection and subject to change. All 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids + HBM and 5th Gen Intel® Xeon® Processor Scalable Family, Codename Emerald Rapids SKU numbers listed here were from pre-Si projection and subject to change.