Eagle Stream Platform

Data Sheet

ID Date Version Classification
814095 04/04/2025 001 Public
Document Table of Contents

System Reference Clock Signals

System Reference Clock (BCLK(0/1/2/3)) Signals

Signal Name Description
BCLK{0,1,2,3}_​DN/DP

Reference Clock Differential input.

These pins provide the required reference inputs to various PLLs inside the processor, such as Intel® UPI and PCIe. BCLK0, BCLK1, BCLK2 and BCLK3 run at 100 MHz from the same clock source.

CD_​PE_​REFCLK_​DN/DP PCIe link Reference Clock for companion die.