SVID Commands

The processor provides the ability to operate while transitioning to a new VID setting on its associated processor voltage rail. This is represented by a DC shift. It should be noted that a low-to-high or high-to-low voltage state change may result in as many VID transitions as necessary to reach the target voltage. Transitions above the maximum specified VID are not supported. The processor supports the following VR commands:

• SetVID_​Fast (<=25 mV/μs for VCCIN, <=10 mV/uS for all other VRs on the SVID bus).
• SetVID_​Slow is 1/4 or 1/2 of SetVID_​Fast.
• SetVID_​Decay not used.

The VRM or EVRD utilized must be capable of regulating its output to the value defined by the new VID.

Power source characteristics must be guaranteed to be stable whenever the supply to the voltage regulator is stable.