SVID Voltage Rail Addressing

Eagle Stream Platform

Data Sheet

ID	Date	Version	Classification
814095	04/04/2025	001	Public

The processor addresses five different voltage rail control segments within VR14/VR13 (VCCIN, VCCINFAON, VCCFA_EHV, VCCFA_EHV_FIVRA, VCCD_HV). The SVID data packet contains a 4-bit addressing code:

SVID Address Usage Bus 0

PWM Address (HEX)	Protocol ID	4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids
00	0Ah (10 mV VR14 VID)	VCCIN
01	09h (5 mV VR14 VID)	VCCINFAON
02	04h (10 mV VR13 VID)	VCCFA_EHV
03	04h (10 mV VR13 VID)	VCCFA_EHV_FIVRA
*Notes:* Check with VR vendors for determining the physical address assignment method for their controllers. VR addressing is assigned on a per voltage rail basis. Dual VR controllers will have two addresses with the lowest order address, always being the higher phase count. For future platform flexibility, the VR controller should include an address offset, as shown with +1 not used.

SVID Address Usage Bus 1

PWM Address (HEX)	Protocol ID	4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids
00	07h (5 mV VR13 VID)	VCCD_HV
*Notes:* Check with VR vendors for determining the physical address assignment method for their controllers. VR addressing is assigned on a per voltage rail basis. Dual VR controllers will have two addresses with the lowest order address, always being the higher phase count.

PWM Address (HEX)

Protocol ID

4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids

07h (5 mV VR13 VID)

VCCD_HV

Notes:

Check with VR vendors for determining the physical address assignment method for their controllers.

VR addressing is assigned on a per voltage rail basis.

Dual VR controllers will have two addresses with the lowest order address, always being the higher phase count.

VCCIN Voltage Identification (VID)

SVID HEX	VCCIN SVID 10 mV Step Mode Voltage (V)	10 mV Step Recommended Accuracy
6F	1.60	±0.5% of VID
70	1.61	±0.5% of VID
71	1.62	±0.5% of VID
72	1.63	±0.5% of VID
73	1.64	±0.5% of VID
74	1.65	±0.5% of VID
75	1.66	±0.5% of VID
76	1.67	±0.5% of VID
77	1.68	±0.5% of VID
78	1.69	±0.5% of VID
79	1.70	±0.5% of VID
7A	1.71	±0.5% of VID
7B	1.72	±0.5% of VID
7C	1.73	±0.5% of VID
7D	1.74	±0.5% of VID
7E	1.75	±0.5% of VID
7F	1.76	±0.5% of VID
80	1.77	±0.5% of VID
81	1.78	±0.5% of VID
82	1.79	±0.5% of VID
83	1.80	±0.5% of VID
84	1.81	±0.5% of VID
85	1.82	±0.5% of VID
86	1.83	±0.5% of VID
87	1.84	±0.5% of VID
88	1.85	±0.5% of VID
89	1.86	±0.5% of VID
8A	1.87	±0.5% of VID
8B	1.88	±0.5% of VID
8C	1.89	±0.5% of VID

Note:VID Range HEX 6F-86 are used by the 4th Gen Intel® Xeon® Processor Scalable Family, Codename Sapphire Rapids.

VCCINFAON, VCCFA_EHV, VCCFA_EHV_FIVRA, VCCD_HV

SVID HEX	VCCINFAON SVID 5 mV Step Mode Voltage (V)	5 mV Step Recommended Accuracy	SVID HEX	VCCFA_EHV and VCCFA_EHV_FIVRA SVID 10 mV Step Mode Voltage (V)	10 mV Step Recommended Accuracy	SVID HEX	VCCD_HV SVID 5 mV Step Mode Voltage (V)	5 mV Step Recommended Accuracy
8D	0.950	± 5 mV	83	1.80	±0.5% of VID	AB	1.100	±0.5% of VID
8E	0.955	± 5 mV
8F	0.960	± 5 mV
90	0.965	± 5 mV
91	0.970	± 5 mV
92	0.975	± 5 mV
93	0.980	±5 mV
94	0.985	± 5 mV
95	0.990	± 5 mV
96	0.995	± 5 mV
97	1.000	±0.5% of VID

Note:DAC accuracy is a recommendation only. Total tolerance band must be met, that is, DAC set point + current sense AVP droop accuracy. See the applicable platform design guidelines for total tolerance band requirements.

Eagle Stream Platform

Data Sheet