Eagle Stream Platform
Data Sheet
Processor Power and Ground Supplies
| Signal Name | Description |
|---|---|
| VCCIN | 1.83V - 1.6V input to the Integrated Voltage Regulator (IVR). 10 mV VR steps; V=f(VID,RLL, I) VR14 compliant. |
| VCCIN_SENSE VSS_VCCIN_SENSE | The remote sense signals for VCCIN rail and are used by the voltage regulator to ensure accurate voltage regulation. These signals must be connected to the voltage regulator feedback circuit, which insures the output voltage remains within specification. See the applicable platform design guide for implementation details. |
| VCCINFAON | 1V rail Infrastructur e Always-On (AON) for early on domains; VR14 compliant, 5 mV VR steps. |
| VCCINFAON_SENSE VSS_VCCINFAON_SENSE | The remote sense signals for VCCINFAON rail and are used by the voltage regulator to ensure accurate voltage regulation. These signals must be connected to the voltage regulator feedback circuit, which insures the output voltage remains within specification. See the applicable platform design guide for implementation details. |
| VCCFA_EHV | 1.8V rail for PCIe 5.0, UPI I/Os and all other FIVRs; VR13 compliant, 10 mV VR steps. |
| VCCFA_EHV_SENSE VSS_VCCFA_EHV_SENSE | The remote sense signals for VCCFA_EHV rail and are used by the voltage regulator to ensure accurate voltage regulation. These signals must be connected to the voltage regulator feedback circuit, which insures the output voltage remains within specification. See the applicable platform design guide for implementation details. |
| VCCFA_EHV_FIVRA | Quiet fixed 1.8V voltage rail for the analog I/O FIVR domains and for the core power for On-Pkg HBM; VR13 compliant, 10 mV VR steps. |
| VCCFA_EHV_FIVRA_SENSE VSS_VCCFA_EHV_FIVRA_SENSE | The remote sense signals for VCCFA_EHV_FIVRA rail and are used by the voltage regulator to ensure accurate voltage regulation. These signals must be connected to the voltage regulator feedback circuit, which insures the output voltage remains within specification. See the applicable platform design guide for implementation details. |
| VCCD_HV | 1.1V rail for all processor DDR5 memory controllers only, not shared with DDR5 DIMMs; VR13 compliant, 5 mV VR steps. |
| VCCD_HV_SENSE VSS_VCCD_HV_SENSE | The remote sense signals for VCCD_HV_SENSE rail and are used by the voltage regulator to ensure accurate voltage regulation. These signals must be connected to the voltage regulator feedback circuit, which insures the output voltage remains within specification. See the applicable platform design guide for implementation details. |
| VCCVNN | Fixed 1V rail to the On Pkg devices and platform CPU GPIO terminations. |
| VPP_HBM | Fixed 2.5V charge pump voltage for On-Pkg HBM. It is mandatory only for HBM enabled SKUs. |
| VCC_3P3_AUX | Fixed 3.3V rail for the On-Pkg devices. It is mandatory in both S5 and S0 states. |
| VSS | Processor ground return. |