Intel® Processor and Intel® Core™ i3 N-Series

Datasheet, Volume 1 of 2

ID 759603
Date 01/04/2023
Version 001
Document Table of Contents

Handling an Intruder

The PCH has an input signal, INTRUDER#, that can be attached to a switch that is activated when the system’s case is open. This input has a two RTC clock debounce. If INTRUDER# goes active (after the debouncer), this will set the INTRD_​DET bit in the TCO2_​STS register. The INTRD_​SEL bits in the TCO_​CNT register can enable the PCH to cause an SMI# or interrupt. The BIOS or interrupt handler can then cause a transition to the S5 state by writing to the SLP_​EN bit.

The software can also directly read the status of the INTRUDER# signal (high or low) by clearing and then reading the INTRD_​DET bit. This allows the signal to be used as a GPI if the intruder function is not required.

If the INTRUDER# signal goes inactive some point after the INTRD_​DET bit is written as a 1, then the INTRD_​DET bit will go to a 0 when INTRUDER# input signal goes inactive.

Note:This is slightly different than a classic sticky bit, since most sticky bits would remain active indefinitely when the signal goes active and would immediately go inactive when a 1 is written to the bit.