Intel® Processor and Intel® Core™ i3 N-Series

Datasheet, Volume 1 of 2

ID 759603
Date 01/04/2023
Version 001
Document Table of Contents

Private Configuration Space Target Port ID

The PCH incorporates a wide variety of devices and functions. The registers within these devices are mainly accessed through the primary interface, such as PCI configuration space and IO/MMIO space. Some devices also have registers that are distributed within the PCH Private Configuration Space at individual endpoints (Target Port IDs) which are only accessible through the PCH Sideband Interface. These PCH Private Configuration Space Registers can be addressed via SBREG_​BAR or through SBI Index Data pair programming.

Private Configuration Space Register Target Port IDs

PCH Device/Function Type

Target Port ID

OPI Configuration

88h

FIA Configuration

CFh

General Purpose I/O (GPIO) Community 0

6Eh

General Purpose I/O (GPIO) Community 1

6Dh

General Purpose I/O (GPIO) Community 2

6Ch

General Purpose I/O (GPIO) Community 4

6Ah

DCI

71h

PCIe Controller #1 (SPA)

80h

PCIe Controller #2 (SPB)

81h

PCIe Controller #3 (SPC)

82h

SATA

D9h

SMBus

C6h

eSPI / SPI

72h

xHCI

70h

CNVi

73h

HSIO Strap Configuration

89h

Real Time Clock (RTC)

C3h

Processor Interface, 8254 Timer, HPET, APIC

C4h

USB 2.0

CAh

UART, I2C, GSPI

CBh

Integrated Clock Controller (ICC)

DCh

eMMC

A1h

General Purpose I/O (GPIO) Community 5

69h

USB Dual Role / OTG

E5h

MODPHY0

ABh

MODPHY1

AAh

MODPHY2

A9h

MODPHY3

A8h

Intel® Trace Hub

B6h