Intel® Processor and Intel® Core™ i3 N-Series
Datasheet, Volume 1 of 2
ID
759603
Date
01/04/2023
Version
001
Legal Disclaimer
Revision History
Introduction
Processor and PCH Device IDs
Package Mechanical Specifications
Memory Mapping
Pin Straps
Electrical and Thermal Characteristics
Technologies
Audio Voice and Speech
Image Processing Unit
Power Management
Power Delivery
Thermal Management
PCH Thermal Sensor
System Clocks
Real Time Clock (RTC)
Memory
USB-C* Sub System (TCSS)
Universal Serial Bus (USB)
PCI Express* (PCIe*)
Serial ATA (SATA)
Universal Flash Storage (UFS)
Graphics
Display
High Precision Event Timer (HPET)
8254 Timers
Processor Sideband Signals
General Purpose Input and Output
GPIO Serial Expander
Intel® Serial I/O Inter-Integrated Circuit (I2C) Controllers
Connectivity Integrated (CNVi)
Integrated Sensor Hub (ISH)
System Management
System Management Interface and SMLink
Host System Management Bus (SMBus) Controller
Serial Peripheral Interface (SPI)
Enhanced Serial Peripheral Interface (eSPI)
Intel® Serial IO Generic SPI (GSPI) Controllers
Touch Host Controller (THC)
Intel® Serial I/O Universal Asynchronous Receiver/Transmitter (UART) Controllers
Private Configuration Space Target Port ID
Testability
Digital Display Signals
Miscellaneous Signals
On Package Interface (OPI)
embedded Multi Media Card (eMMC*)
Security Technologies
Intel® Advanced Encryption Standard New Instructions
Perform Carry-Less Multiplication Quad Word Instruction (PCLMULQDQ)
Intel® Secure Key
Execute Disable Bit
Boot Guard Technology
Intel® Supervisor Mode Execution Protection (SMEP)
Intel® Supervisor Mode Access Protection (SMAP)
Intel® Secure Hash Algorithm Extensions (Intel® SHA Extensions)
User Mode Instruction Prevention (UMIP)
Read Processor ID (RDPID)
Control-flow Enforcement Technology (Intel® CET)
KeyLocker Technology
Power and Performance Technologies
Intel® Smart Cache Technology
IA Core Level 1 and Level 2 Caches
Ring Interconnect
Power Aware Interrupt Routing (PAIR)
Enhanced Intel SpeedStep® Technology
Intel® Turbo Boost Technology 2.0
Intel® Thermal Velocity Boost
Intel® Speed Shift Technology
Intel® Advanced Vector Extensions 2
Intel® 64 Architecture x2APIC
Intel® Dynamic Tuning Technology (DTT)
Intel® GNA 3.0
Cache Line Write Back (CLWB)
Remote Action Request (RAR)
User Mode Wait Instructions
Feature Overview
Intel® High Definition Audio (Intel® HD Audio) Controller Capabilities
Audio DSP Capabilities
Intel® High Definition Audio Interface Capabilities
Direct Attached Digital Microphone (PDM) Interface
USB Audio Offload Support
I2S/PCM Interface
Intel® Display Audio Interface
MIPI® SoundWire* Interface
Power Management
Signal Description
Integrated Pull-Ups and Pull-Downs
I/O Signal Planes and States
Functional Description
Advanced Configuration and Power Interface (ACPI) States Supported
Processor IA Core Power Management
Processor Graphics Power Management
System Agent Enhanced Intel SpeedStep® Technology
Type C Sub System (TCSS) Power State
Thermal Management Features
Adaptive Thermal Monitor
Digital Thermal Sensor
PROCHOT# Signal
PROCHOT Output Only
Bi-Directional PROCHOT#
PROCHOT Demotion Algorithm
Voltage Regulator Protection using PROCHOT#
Thermal Solution Design and PROCHOT# Behavior
Low-Power States and PROCHOT# Behavior
THRMTRIP# Signal
Critical Temperature Detection
On-Demand Mode
MSR Based On-Demand Mode
I/O Emulation-Based On-Demand Mode
System Memory Interface
DDR Support Matrix
Supported Memory Modules and Devices
System Memory Timing Support
SAGV Points
Memory Controller (MC)
Technology Enhancements of Intel® Fast Memory Access (Intel® FMA)
Data Scrambling
Data Swapping
Ascending and Descending
DRAM Clock Generation
DRAM Reference Voltage Generation
Data Swizzling
Error Correction With Standard RAM
Functional Description
Interrupt Generation
PCI Express* Power Management
Port 8xh Decode
Separate Reference Clock with Independent SSC (SRIS)
Advanced Error Reporting
Single - Root I/O Virtualization (SR - IOV)
SERR# Generation
Hot - Plug
PCI Express* Lane Polarity Inversion
Precision Time Measurement (PTM)
Functional Description
Configurable GPIO Voltage
GPIO Buffer Impedance Compensation
Interrupt / IRQ via GPIO Requirement
Programmable Hardware Debouncer
Integrated Pull-ups and Pull-downs
SCI / SMI# and NMI
Timed GPIO
GPIO Blink (BK) and Serial Blink (SBK)
GPIO Ownership
Native Function and TERM Bit Setting
USB Audio Offload Support
USB Audio Offload provides audio mixing / processing support for USB audio endpoint connected through the xHCI Controller. This is aimed at providing a universal audio offload power benefit across various audio devices connected to the platform and USB audio usage is expected to gain more popularity with the introduction of USB Type-C* connector. These USB audio endpoint will be enumerated by the xHCI Controller SW and only the audio streaming path is peer to the Audio DSP subsystem for DSP FW mixing / processing support. USB Audio Offload capabilities are listed as follows:
- Up to 2 audio output streams support
- Up to 4 audio input streams support
- Provides cadence for 44.1 kHz-based sample rate output
- Support isochronous audio stream offload for LS / FS / HS USB audio device
- Support synchronous / asynchronous / adaptive modes of isochronous audio streaming
- Support non-PCM encoded audio bit stream defined by IEC61937 / IEC60958 standard
- Single audio playback (synchronous / adaptive) at 4 ch x 192 KHz x 24 bits
- Support isochronous audio stream offload for LS / FS / HS USB audio device
- Single audio playback (asynchronous) at 8 ch x 48 KHz x 24 bits + single audio sync input at 1 ch x 1 KHz x 32 bits
- Up to 2 concurrent audio playback (synchronous / adaptive) at 8 ch x 96 KHz x 24 bit + 4ch x 48 KHz x 24 bit
- Single audio capture (synchronous / asynchronous) at 4 ch x 96 KHz x 24 bits
- Up to 2 concurrent audio capture (synchronous / asynchronous) of 8 ch x 48 KHz x 24 bit + audio sync input at 4 ch x 48 KHz x 24 bit