Power and Ground Signals
This section describes the PCH power rails.
Power Rail Descriptions
| Name | Description |
|---|
| VCCPRIM_CORE_0P82 | Primary Core Voltage: 0.82 V |
| VCCDUSB_0P82 | USB digital logic voltage: 0.82 V |
| VCCHSIO_0P82 | HSIO Supply Voltage: 0.82 V |
| VCCAHSIOPLL_1P8 | Analog supply for HSIO PLLs: 1.8 V |
| VCCA_XTAL_PLL_1P8 | Analog supply for XTAL circuit: 1.8 V |
| VCCA_XTAL_PLL_0P82 | Analog supply for XTAL circuit: 0.82 V |
| VCCDSW_3P3 | Deep Sx Well Voltage: 3.3 V |
| VCCPRIM_1P8 | Primary Well: 1.8 V |
| VCCPRIM_3P3 | Primary Well: 3.3 V |
| VCCSPI | SPI Voltage: 3.3 V or 1.8 V. |
| VCCPRIM_JTAGPROC | This rail should be connected to the Processor VCCPRIM_IO_OUT_PCH rail |
| DCPRTC | This rail is generated internally and needs to be routed out to the motherboard for decoupling purpose. |
| VCCRTC | RTC Well Supply. This rail can drop to 2.0 V if all other planes are off. This power is not expected to be shut off unless the RTC battery is removed or drained. - VCCRTC nominal voltage is 3.0 V. This rail is intended to always come up first and always stay on. It should NOT be power cycled regularly on non-coin battery designs.
- Implementation should not attempt to clear CMOS by using a jumper to pull VCCRTC low. Clearing CMOS can be done by using a jumper on RTCRST# or GPI.
|
| DCPCNVILDO1 | This rail is generated internally and needs to be routed out to the motherboard for decoupling purpose. |
| DCPCNVILDO2 | This rail is generated internally and needs to be routed out to the motherboard for decoupling purpose. |
| VCCPGPPA | Power rail for GPP_A group. |
| VCCPGPPBC | Power rail for GPP_B and GPP_C group. |
| VCCPGPPDR | Power rail for GPP_D and GPP_R group. |
| VCCPGPPEFHK | Power rail for GPP_E, GPP_F,GPP_H and GPP_K group. |
| VCCPGPPI | Power rail for GPP_I group. |
| VSS | Ground |