DMA

Direct Memory Access

HDMI*

High Definition Multimedia Interface

Intel^® TH

Intel^® Trace Hub

IOV

I/O Virtualization

LTR

The Latency Tolerance Reporting (LTR) mechanism enables endpoints to report their service latency requirements for Memory Reads and Writes to the Root Complex, so that power management policies for central platform resources (such as main memory, RC internal interconnects, and snoop resources) can be implemented to consider endpoint service requirements.

PECI

Platform Environment Control Interface

Processor

The 64-bit multi-core component (package)

S0ix-states

Processor and PCH residency idle standby power states.

SCI

System Control Interrupt. SCI is used in the ACPI protocol.

SHA

Secure Hash Algorithm

SSC

Spread Spectrum Clock

STR

Suspend to RAM

V_CC

PCH Core Power Supply

V_SS

PCH Ground

#

A suffix of # indicates an active low signal. For example, RSMRST#.

h

Hexadecimal numbers are identified with an h in the number. All numbers are decimal (base 10) unless otherwise specified. Non-obvious binary numbers have the ‘b’ enclosed at the end of the number. For example, 0101b.