PCIE _​[24:1]_​TXN

PCIE _​[24:1]_​TXP

O

PCI Express* Differential Transmit Pairs

These are the PCI Express* based outbound high-speed differential signals

PCIE_​[24:1]_​RXN

PCIE_​[24:1]_​RXP

I

PCI Express* Differential Receive Pairs

These are the PCI Express* based inbound high-speed differential signals

PCIE_​RCOMP2

PCIE_​RCOMP5

I

PCI Express* PHY Impedance Compensation Inputs

PCIE_​LINK_​DOWN

O

PCI Express* Link Down Debug Signal

PCIe* link failure debug signal. PCIe* Root Port(s) will assert this signal when a link down event occurs and is detected. For example when a link fails to train during an L1 sub-state exit event.