Signal Description

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Introduction
PCH Controller Device IDs
- Revision IDs
- Device IDs
Memory Mapping
- Functional Description
- Memory Map
Audio Voice and Speech
Ballout Definition
Connectivity Integrated (CNVi)
Controller Link
Direct Enhanced Serial Peripheral Interface (Direct eSPI)
Direct Media Interface (DMI)
Enhanced Serial Peripheral Interface (eSPI)
Gigabit Ethernet Controller
Host System Management Bus (SMBus) Controller
Integrated Sensor Hub (ISH)
Intel® Serial I/O Improved Inter-Integrated Circuit (I3C) Controllers
Intel® Serial I/O Inter-Integrated Circuit (I2C) Controllers
Intel® Serial I/O Universal Asynchronous Receiver/Transmitter (UART) Controllers
Intel® Serial IO Generic SPI (GSPI) Controllers
PCI Express* (PCIe*)
Real Time Clock (RTC)
- Signal Description
- I/O Signal Planes and States
Serial ATA (SATA)
Serial Peripheral Interface (SPI)
System Clocks
- Integrated Clock Controller (ICC)
  - Signal Descriptions
- I/O Signal Pin States
System Management Interface and SMLink
Touch Host Controller (THC)
Universal Serial Bus (USB)
General Purpose Input and Output
- Functional Description
- Signal Description
GPIO Serial Expander
Private Configuration Space Port ID
Security Firmware Engines
- Intel® Converged Security and Management Engine (Intel® CSME)
- Intel® Silicon Security Engine
System Management
- Theory of Operation
  - TCO Modes
Testability and Monitoring
- Signal Description
- I/O Signal Planes and States
Miscellaneous Signals
Processor Sideband Signals
- Signal Description
- I/O Signal Planes and States
Power Delivery
- Power and Ground Signals
Power Management
Thermal Sensor
Electrical Characteristics

Signal Name	Type	Description
RTCX1	I	Crystal Input 1: This signal is connected to the 32.768 kHz crystal (max 50 kohm ESR). If no external crystal is used, then RTCX1 can be driven with the desired clock rate. Maximum voltage allowed on this pin is 1.5 V.
RTCX2	O	Crystal Input 2: This signal is connected to the 32.768 kHz crystal (max 50 kohm ESR). If no external crystal is used, then RTCX2 must be left floating.
RTCRST#	I	RTC Reset: When asserted, this signal resets register bits in the RTC well. Notes: Unless CMOS is being cleared (only to be done in the G3 power state) with a jumper, the RTCRST# input must always be high when all other RTC power planes are on.
SRTCRST#	I	Secondary RTC Reset: This signal resets the manageability register bits in the RTC well when the RTC battery is removed. Notes: The SRTCRST# input must always be high when all other RTC power planes are on. SRTCRST# and RTCRST# should not be shorted together.

I/O Signal Planes and States

Real Time Clock (RTC) I/O Signal Planes and States