12th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2

ID 655258
Date 08/08/2022
Document Table of Contents

Advanced Configuration and Power Interface (ACPI) States Supported

This section describes the ACPI states supported by the processor.

System States

State

Description

G0/S0/C0

Full On: CPU operating. Individual devices may be shut to save power. The different CPU operating levels are defined by Cx states.

GO/S0/Cx

Cx state: CPU manages C-states by itself and can be in low power state

G1/S3

Suspend-To-RAM (STR): The system context is maintained in system DRAM, but power is shut to non-critical circuits. Memory is retained, and refreshes continue. All external clocks are shut off; RTC clock and internal ring oscillator clocks are still toggling.

In S3, SLP_​S3 signal stays asserted, SLP_​S4 and SLP_​S5 are inactive until a wake occurs.

G1/S4

Suspend-To-Disk (STD): The context of the system is maintained on the disk. All power is then shut to the system except to the logic required to resume. Externally appears same as S5 but may have different wake events.

In S4, SLP_​S3 and SLP_​S4 both stay asserted and SLP_​S5 is inactive until a wake occurs.

G2/S5

Soft Off: System context not maintained. All power is shut except for the logic required to restart. A full boot is required when waking.

Here, SLP_​S3, SLP_​S4, and SLP_​S5 are all active until a wake occurs.

G3

Mechanical OFF: System context not maintained. All power shut except for the RTC. No “Wake” events are possible because the system does not have any power. This state occurs if the user removes the batteries, turns off a mechanical switch, or if the system power supply is at a level that is insufficient to power the “waking” logic. When system power returns the transition will depend on the state just prior to the entry to G3.

Integrated Memory Controller (IMC) States 

State Description

Power-Up

CKE asserted. Active mode.

Pre-Charge Power Down

CKE de-asserted (not self-refresh) with all banks closed.

Active Power Down

CKE de-asserted (not self-refresh) with minimum one bank active.

Self-Refresh

CKE de-asserted using device self-refresh.

G, S, and C Interface State Combinations 

Global (G) State

Sleep (S) State

Processor Package (C) State

Processor State

System Clocks

Description

G0

S0

C0

Full On

On

Full On

G0

S0

C2 1

Deep Sleep

On

Deep Sleep

G0

S0

C3 1

Deep Sleep

On

Deep Sleep

G0

S0

C6

Deep Power Down

On

Deep Power Down

G0

S0

C8/C10

Off

On

Deeper Power Down

G1

S3

Power off

Off

Off, except RTC

Suspend to RAM

G1

S4

Power off

Off

Off, except RTC

Suspend to Disk

G2

S5

Power off

Off

Off, except RTC

Soft Off

G3

N/A

Power off

Off

Power off

Hard off

Notes:
  1. PkgC2/C3 are non-architectural: software cannot request to enter these states explicitly. These states are intermediate states between PkgC0 and PkgC6.