12th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2

ID 655258
Date 08/08/2022
Document Table of Contents

MIPI* DSI

Display Serial Interface (DSI*) specifies the interface between a host processor and peripherals such as a display module. DSI is a high speed and high performance serial interface that offers efficient and low power connectivity between the processor and the display module.

  • One link x8 data lanes or two links each with x4 lanes support.

  • Supported on Low power optimized pipes.

  • Support Backlight PWM control and enable signals, and power enable.

  • Support VESA DSC (Data Stream Compression).

MIPI* DSI Overview

MIPI* DSI Maximum Resolution

Standard

S-Processor Line H/P-Processor Line U-Processor Line

MIPI* DSI (Single Link)

N/A

3200x2000 @60 Hz 24 bpp

3200x2000 @60 Hz 24 bpp

MIPI* DSI (Single Link) with DSC

N/A

5120x3200 @60 Hz 24 bpp

5120x3200 @60 Hz 24 bpp

MIPI* DSI (Dual Link)

N/A

4096x2304 @60 Hz 24 bpp

3840x2160 @60 Hz 24 bpp

4096x2304 @60 Hz 24 bpp

3840x2160 @60 Hz 24 bpp

MIPI* DSI (Dual Link) with DSC

N/A

5120x3200 @60 Hz 24 bpp

5120x3200 @60 Hz 24 bpp

Notes:
  1. MIPI DSI is available on H/P/U Processor Lines only.

  2. bpp - bit per pixel.

  3. Resolution support is subject to memory BW availability.