12th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2

ID 655258
Date 08/08/2022
Document Table of Contents

CSI-2 Lane Configuration

CSI-2 Lane Configuration for H/P/U-Processor Lines

Port Data/Clock

Configuration Option 1

Configuration Option 2

Port A Clock

NA

x2

Port A Lane 0

x4

Port A Lane 1

Port B Clock

x2

Port B Lane 0

Port B Lane 1

Port C Clock

x4

x2

Port C Lane 0

Port C Lane 1

Port D Lane 0

x2

Port D Lane 1

Port D Clock

NA