12th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2

ID 655258
Date 08/08/2022
Document Table of Contents

GTL and OD DC Specification

GTL Signal Group and Open Drain Signal Group DC Specifications

Symbol

Parameter

Minimum

Maximum

Units

Notes1

VIL

Input Low Voltage (TAP, except PROC_​JTAG_​TCK, PROC_​JTAG_​TRST#)

0.6*Vcc

V

2, 5

VIH

Input High Voltage (TAP, except PROC_​JTAG_​TCK, PROC_​JTAG_​TRST#)

0.72*Vcc

V

2, 4, 5

VIL

Input Low Voltage (PROC_​JTAG_​TCK,PROC_​JTAG_​TRST#)

0.3*Vcc

V

2, 5

VIH

Input High Voltage (PROC_​JTAG_​TCK,PROC_​JTAG_​TRST#)

0.7*Vcc

V

2, 4, 5

VHYSTERESIS

Hysteresis Voltage

0.2*Vcc

V

-

RON

Buffer on Resistance (TDO)

7

17

Ω

-

VIL

Input Low Voltage (other GTL)

0.6*Vcc

V

2, 5

VIH

Input High Voltage (other GTL)

0.72*Vcc

V

2, 4, 5

RON

Buffer on Resistance (BPM)

12

28

Ω

-

RON

Buffer on Resistance (other GTL)

16

24

Ω

-

ILI

Input Leakage Current

±150

μA

3

Notes:
  1. All specifications in this table apply to all processor frequencies.
  2. The Vcc referred to in these specifications refers to instantaneous Vcc1p05_​PROC/IO.
  3. For VIN between 0 V and Vcc. Measured when the driver is tri-stated.
  4. VIH and VOH may experience excursions above Vcc. However, input signal drivers should comply with the signal quality specifications.
  5. Refer to the processor I/O Buffer Models for I/V characteristics.