12th Generation Intel® Core™ Processors

Datasheet, Volume 1 of 2

ID Date Version Classification
655258 08/08/2022 Public

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Document Table of Contents

DRAM Clock Generation

Each support rank has a differential clock pair for DDR4/5. Each sub-channel has a differential clock pair for LPDDR4x. Each sub-channel has a (CK_​P/N and WCK_​P/N) differential clock pair for LPDDR5.