Intel® Pentium® Silver and Intel® Celeron® Processors Datasheet, Volume 1

Datasheet

ID Date Version Classification
633935 17/06/2021 00:00:00 Public Content

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Document Table of Contents
DSP

SMBus Power Gating

SMBus shares the Power Gating Domain with Primary-to-Sideband Bridge (P2SB).

A single FET controls the single Power Gating Domain; but SMBus and P2SB each has its own dedicated Power Gating Control Block.

The FET is only turned off when all these interfaces are ready to PG entry or already in the PG state.