Intel® Pentium® Silver and Intel® Celeron® Processors

Datasheet, Volume 1 of 2

ID 633935
Date 12/27/2022
Document Table of Contents

Features Supported

  • HW Command Queuing support complaint to eMMC* v5.1 specification
  • Support enhanced Strobe for HS400 mode @1.8 V
  • Both ADMA2/DMA and Non-DMA mode of operation
  • Transfers the data in 1 bit, 4 bit and 8 bit mode
  • Support 64b address
  • Cyclic Redundancy Check CRC7 for command and CRC16 for data integrity
  • Support for Tx Path tuning and retention of DLL delay values