Intel® Pentium® Silver and Intel® Celeron® Processors

Datasheet, Volume 1 of 2

ID Date Version Classification
633935 12/27/2022 Public
Document Table of Contents
DSP

I/O Signal Planes and States

Signal Name

Power Plane

During Reset

Immediately after Reset

S3/S4/S5

Deep Sx

ESPI_​CLK

Primary

Internal Pull- down

Driven Low

Driven Low

Off

ESPI_​IO [3:0]

Primary

Internal Pull-up

Internal Pull-up

Internal Pull-up

Off

ESPI_​ CS _​N

Primary

Internal Pull-up

Driven High

Driven High

Off

ESPI_​RESET_​N

Primary

Driven Low

Driven High

Driven High

Off