Jasper Lake EDS Vol1

Datasheet

ID 633935
Date 01/01/2021
Public Content

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Document Table of Contents
DSP

DRAM Reference Voltage Generation

The memory controller has the capability of generating the LPDDR4X and DDR4 Reference Voltage (VREF) internally for both read and write operations. The Vref is trained during cold boot by advanced training procedures in order to provide the best channel margins.