Jasper Lake EDS Vol1

Datasheet

ID 633935
Date 01/01/2021
Public Content

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Document Table of Contents
DSP

GTL and Open Drain DC Specification

GTL Signal Group and Open Drain Signal DC Specifications

Associated Signals: CPU_​JTAG_​TRST_​N, CPU_​JTAG_​TMS, CPU_​JTAG_​TDO, CPU_​JTAG_​TDI, CPU_​JTAG_​TCK, CFG[0:15], CFG_​AVRB_​STB_​[0:1]P, CFG_​AVRB_​STB_​[0:1]N, BPM[0:3]_​N, JTAG_​PREQ_​N, JTAG_​PRDY_​N , CATERR_​N , THRMTRIP_​N , PROCHOT_​N, SVID_​CLK, SVID_​DATA

Symbol

Parameter

Minimum

Maximum

Units

Notes1

VIL

Input Low Voltage (Except CPU_​JTAG_​TCK, CPU_​JTAG_​TRST_​N)

0.6*Vcc

V

2

VIH

Input High Voltage (Except CPU_​JTAG_​TCK, CPU_​JTAG_​TRST_​N)

0.72*Vcc

V

2, 4

VIL

Input Low Voltage (CPU_​JTAG_​TCK,CPU_​JTAG_​TRST_​N)

0.3*Vcc

V

2

VIH

Input High Voltage (CPU_​JTAG_​TCK,CPU_​JTAG_​TRST_​N)

0.7*Vcc

V

2, 4

VHYSTERESIS

Hysteresis Voltage

0.2*Vcc

V

-

RPU

Pull Up on BPM[0:3] and CFG_​AVRB_​STB_​[0:1]N/P

40

60

Ω

RPD

Pull down on SVID_​CLK/DATA, CATERR_​N, JTAG_​PRDY, JTAG_​TDO

7

17

Ω

RPD

Pull Down on THRMTRIP_​N, PROCHOT_​N and BPM [0:3]

12

28

Ω

ILI

Input Leakage Current

±150

μA

3

Notes:
  1. Unless otherwise noted, all specifications in this table apply to all processor frequencies.
  2. The Vcc referred to in these specifications refers to instantaneous VccST/IO.
  3. For VIN between 0 V and Vcc. Measured when the driver is tri-stated.
  4. VIH and VOH may experience excursions above Vcc.
  5. JTAG_​PRDY_​N, JTAG_​TDO,CATERR_​N, PROCHOT_​N,THRMTRIP_​N and SVID_​CLK are Open Drain
  6. Edge rate for BPM[0:3], THRMTRIP_​N, CFG_​AVRB_​STB_​[0:1]N/P, SVID_​CLK, SVID_​DATA, CATERR_​N, PROCHOT_​N, JTAG PRDY_​N and JTAG TDO is between 1.45V/nS to 3.45V/nS.