Jasper Lake EDS Vol1


ID 633935
Date 01/01/2021
Public Content

A newer version of this document is available. Customers should click here to go to the newest version.

Document Table of Contents

Features Supported

  • Interrupt Generation
  • PCI Express* Power Management
  • Latency Tolerance Reporting (LTR)
  • Dynamic Link Throttling
  • Port 8xh Decode
  • PCI Express* Separate Reference Clock with Independent Spread Spectrum Clocking (SRIS)
  • Advanced Error Reporting
  • Single Root I/O Virtualization (SR- IOV) Capability with Access Control Services (ACS) and Alternative Routing ID (ARI)
  • SERR# Generation
  • PCI Express* ExpressCard 1.0 module based hot-plug
  • PCI Express* TX and RX Lane Polarity Inversion
  • End-to-End PCI Express* Controller Lane Reversal
  • Dynamic Link Width Negotiation as a Target
  • Dynamic Speed Change
  • 256B Maximum Data Payload Size
  • PCIe* Subtractive Decode is not supported
    • PCI can still be supported via a PCIe*-to-PCI bridge. However, legacy PCI devices (such as PCMCIA or non-plug-and-play device) that need subtractive decode are not supported.
  • Common RefClk RX Architecture support
  • Precision Time Measurement (PTM)