Jasper Lake EDS Vol1
Intel® Serial I/O Generic SPI (GSPI) Controllers
The PCH implements three generic SPI interfaces to support devices that uses serial protocol for transferring data.
Each interface consists of a clock (CLK), two chip selects (CS) and 2 data lines (MOSI and MISO).
- Support bit rates up to 20 Mbits/s
- Support data size from 4 to 32 bits in length and FIFO depths of 64 entries
- Support DMA with 128-byte FIFO per channel (up to 64-byte burst)
- Full duplex synchronous serial interface
- Support the Motorola’s* SPI protocol
- Operate in master mode only
Generic Serial Peripheral Interface
Latency Tolerance Reporting