Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Capability Disable Status 2 (STPG_FUSE_SS_DIS_RD_2) – Offset 1e44
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:20 | - | - | Reserved
|
19 | 0b | RO/V | XDCI Disable () RO bit indicating if XDCI function is disabled. |
18:17 | - | - | Reserved
|
16 | 0b | RO/V | DSP Disable () RO bit indicating if DSP function is disabled. |
15:14 | - | - | Reserved
|
13 | 0b | RO/V | LPC Disable () RO bit indicating if LPC function is disabled. |
12:10 | - | - | Reserved
|
9 | 0b | RO/V | SMB Disable () RO bit indicating if SMB function is disabled. |
8:7 | - | - | Reserved
|
6 | 0b | RO/V | Intel Serial I/O Disable () RO bit indicating if Intel Serial I/O function is disabled. |
5 | 0b | RO/V | EMMC Disable () RO bit indicating if EMMC function is disabled. |
4 | 0b | RO/V | CNVI Disable () RO bit indicating if CNVI function is disabled. |
3 | - | - | Reserved
|
2 | 0b | RO/V | SD Controller Disable () RO bit indicating if SD Controller function is disabled. |
1 | 0b | RO/V | ISH Disable () RO bit indicating if ISH function is disabled. |
0 | 0b | RO/V | GBE Disable () RO bit indicating if GBE function is disabled. |