Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
| ID | Date | Version | Classification |
|---|---|---|---|
| 615146 | 08/09/2019 | 1.2 | Public |
Device Capabilities (DCAP) – Offset 44
| Bit Range | Default | Access | Field Name and Description |
|---|---|---|---|
| 30:29 | - | - | Reserved
|
| 28 | 0b | RO | Function Level Reset Capable (FLRC) Not supported in Root Ports |
| 27:26 | 00b | RO | Captured Slot Power Limit Scale (CSPS) Not supported |
| 25:18 | 00h | RO | Captured Slot Power Limit Value (CSPV) Not supported |
| 17:16 | - | - | Reserved
|
| 15 | 1b | RO | Role Based Error Reporting (RBER) When Set, this bit indicates that the Function implements the functionality originally defined in |
| 14:12 | - | - | Reserved
|
| 11:9 | 000b | RO | Endpoint L1 Acceptable Latency (E1AL) Reserved for root ports. |
| 8:6 | 000b | RO | Endpoint L0 Acceptable Latency (E0AL) Reserved for Root port. |
| 5 | 0b | RO | Extended Tag Field Supported (ETFS) The root port never needs to initiate a transaction as a Requester with the Extended Tag bits being set. This bit does not affect the root port's ability to forward requests as a bridge as the root port always supports forwarding requests with extended tags. |
| 4:3 | 00b | RO | Phantom Functions Supported (PFS) No phantom functions supported |
| 2:0 | 001b | RW/O | Max Payload Size Supported (MPS) BIOS should write to this field during system initialization. |