Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
Vendor Specific Component Capabilities for Component 1 (BIOS_SFDP1_VSCC1) – Offset c8
This register pertain to cycles targeting addresses outside of Component 0. The lockable bits in this register are locked when either CPPTV is set to 1 by hardware or when VCL is 1.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31 | 0b | RO/V | Component Property Parameter Table Valid (CPPTV) This bit is set to a 1 if the Flash Controller detects a valid SFDP Component Property Parameter Table in Component 1. |
30 | - | - | Reserved
|
29 | 0b | RW/V/L | 64k Erase Valid (EO_64k_VALID) 0: The EO_64k opcode is not valid. |
28 | 0b | RW/V/L | 4k Erase Valid (EO_4k_VALID) 0: The EO_4k opcode is not valid. |
27 | 0b | RW/L | RPMC Supported (RPMC_SUPPORTED) 0 The device does not support RPMC. |
26 | 0b | RW/V/L | Deep Powerdown Supported (DEEP_PWRDN_SUPPORTED) 0 The device does not support Deep Powerdown. |
25 | 0b | RW/V/L | Suspend/Resume Supported (SUSPEND_RESUME_SUPPORTED) 1 the device supports Suspend/Resume |
24 | 0b | RW/V/L | Soft Reset Supported (SOFT_RST_SUPPORTED) 0: The device does not support Soft Reset. |
23:16 | 00000000b | RW/V/L | 64k Erase Opcode (EO_64k) This register is programmed with the Flash 64k sector erase instruction opcode for component 1. |
15:8 | 20h | RW/V/L | 4k Erase Opcode (EO_4k) This register is programmed with the Flash 4k subsector erase instruction opcode for component 1. |
7:5 | 000b | RW/V/L | Quad Enable Requirements (QER) 000 = Part does not require a Quad Enable bit to be set, either because Quad is not supported or because the manufacturer somehow permanently enables Quad capability. |
4 | 0b | RW/V/L | Write Enable on Write Status (WEWS) 0 : 50h is the opcode to enable a status register write |
3 | 0b | RW/V/L | Write Status Required (WSR) 0: No requirement to write to the Write Status Register prior to a write |
2 | 0b | RW/V/L | Write Granularity (WG) 0 : Reserved |
1:0 | - | - | Reserved
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