Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
General Interrupt Control (GIC) – Offset 31fc
Note: FEC10000h - FEC3FFFFh is allocated to PCIe when Port I/OxApic Enable (PAE) bit is set.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:18 | - | - | Reserved
|
17 | 0b | RW | Alternate Access Mode Enable (AME) When set, read only registers can be written, and write only registers can be read. |
16 | 0b | RW | Shutdown Policy Select (SDPS) When cleared (default) the PCH will update INIT# in response to the shutdown Vendor Defined Message (VDM). When set to 1, PCH will treat the shutdown VDM similar to receiving a CF9h I/O write, and will drive PLTRST# active. |
15:9 | 0000000b | RW | MAX_IRQ_ENTRY_SIZE (MAXIRQSIZE) This field indicates the size of the IOAPIC entry. The default size is 120 entries. |
8:1 | - | - | Reserved
|
0 | 0b | RO/P | CPU Shutdown Status (CPUSDSTS) This bit is set to 1 if the CPU sends the Shutdown Special cycle message. The Shutdown Message is recognized as an INIT# event if the Shutdown Policy Select = 0, else PCH shall treat the Shutodwn Special cycle as a request for CF9 Hard Reset. |