Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
ID | Date | Version | Classification |
---|---|---|---|
615146 | 08/09/2019 | 1.2 | Public |
Delay Rx Clock (DEL_RX_CLK) – Offset 250
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
30:2 | - | - | Reserved
|
1:0 | 0h | RW | Delayed Rx Clock Select (RX_CLK_SEL) 00 = The output of the internal (M/N and/or baud rate) clock divider is used as-is to clock in the receive data to the RxFIFO. |