Intel® 400 Series Chipset On-Package Platform Controller Hub
Online Register Database
ID | Date | Version | Classification |
---|---|---|---|
615146 | 08/09/2019 | 1.2 | Public |
Pad Configuration DW0 (PAD_CFG_DW0_GPD_0) – Offset 600
This register applies to GPD0.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:30 | 00b | RW | Pad Reset Config (PADRSTCFG) This register controls which reset is used to reset GPIO pad register fields in PAD_CFG_DW0 and PAD_CFG_DW1 registers. This register can be used for Sx isolation of the associated signal if needed. |
29 | 0b | RW | RX Pad State Select (RXPADSTSEL) Determines from which node the RX pad state for native function should be taken from. This field only affects the pad state value being fanned out to native function(s) and is not meaningful if the pad is in GPIO mode (i.e. Pad Mode = 0). |
28 | 0b | RW | RX Raw Override to '1' (RXRAW1) This bit determines if the selected pad state is being overridden to '1'. This field is only applicable when the RX buffer is configured as an input in either GPIO Mode or native function mode. The override takes place at the internal pad state directly from buffer and before the RXINV. |
27 | - | - | Reserved
|
26:25 | 10b | RW | RX Level/Edge Configuration (RXEVCFG) Determines if the internal RX pad state (synchronized, filtered vs non-filtered version as determined by PreGfRXSel, and is further subject to RXInv) should be passed on to the next logic stage as is, as a pulse, or level signal. This field does not affect the received pad state (to GPIORXState or native functions) but how the interrupt or wake triggering events should be delivered to the GPIO Community Controller . |
24 | 0b | RW | Pre Glitch Filter Stage RX Pad State Select (PREGFRXSEL) Determine if the synchronized version of the raw RX pad state should be subjected to glitch filter or not. This field only makes sense when the RX buffer is configured as an input and is not disabled. 0 = Select synchronized, non filtered RX pad state |
23 | 0b | RW | RX Invert (RXINV) This bit determines if the selected pad state should go through the polarity inversion stage. This field is only applicable when the RX buffer is configured as an input in either GPIO Mode or native function mode. The polarity inversion takes place at the mux node of raw vs filtered or non-filtered RX pad state, as determined by PreGfRXsel and RXPadStSel This bit does not affect GPIORXState. |
22:21 | 00b | RO | RX/TX Enable Config (RXTXENCFG) This controls the RX and TX buffer enablement for the function selected by Pad Mode. This field is not applicable in GPIO mode (PMode = 0. |
20 | 0b | RW | GPIO Input Route IOxAPIC (GPIROUTIOXAPIC) Determines if the pad can be routed to cause peripheral IRQ when configured in GPIO input mode. If the pad is not configured in GPIO input mode, this field has no effect. |
19 | 0b | RW | GPIO Input Route SCI (GPIROUTSCI) Determines if the pad can be routed to cause SCI when configured in GPIO input mode. If the pad is not configured in GPIO input mode, this field has no effect. |
18 | 0b | RO | GPIO Input Route SMI (GPIROUTSMI) Determines if the pad can be routed to cause SMI when configured in GPIO input mode. If the pad is not configured in GPIO input mode, this field has no effect. |
17 | 0b | RO | GPIO Input Route NMI (GPIROUTNMI) Determines if the pad can be routed to cause NMI when configured in GPIO input mode. If the pad is not configured in GPIO input mode, this field has no effect. |
16:11 | - | - | Reserved
|
10 | See Description | RW | Pad Mode (PMODE) This field determines whether the Pad is controlled by GPIO controller logic or one of the native functions muxed onto the Pad. |
9 | 1b | RW | GPIO RX Disable (GPIORXDIS) 0 = Enable the input buffer (active low enable) of the pad. |
8 | 1b | RW | GPIO TX Disable (GPIOTXDIS) 0 = Enable the output buffer (active low enable) of the pad. |
7:2 | - | - | Reserved
|
1 |
| RO/V | GPIO RX State (GPIORXSTATE) This is the current internal RX pad state after Glitch Filter logic stage and is not affected by PMode and RXINV settings. |
0 | 0b | RW | GPIO TX State (GPIOTXSTATE) 0 = Drive a level '0' to the TX output pad. |