Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Alternate Protocol Control Register (APCTRLR) – Offset b14
This is the Alternate Protocol Control Register registers. Refer description for each individual field below for more details of the register functionality.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:8 | 0h | RO | Reserved (RSVD_M) Reserved |
7:0 | ffh | RW | Alternate Protocol Index Select (APIS) This field determines which Lane and which Alternate Protocol of that Lane is visible in Alternate Protocol Data 1 Register and Alternate Protocol Data 2 Register . |