Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
PGD PFET Enable Ack Status Register 1 (PPFEAR1) – Offset 1d94
PGD PFET Enable Ack Status Register
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:29 | 0h | RO | Reserved |
28 | 0h | RO/V | HDA Power Gate PFET Enable Ack Status (AGT60_PFET_EN_ACK_STS) Same description as bit 0. |
27 | 0h | RO/V | HDA Power Gate PFET Enable Ack Status (AGT59_PFET_EN_ACK_STS) Same description as bit 0. |
26 | 0h | RO/V | HDA Power Gate PFET Enable Ack Status (AGT58_PFET_EN_ACK_STS) Same description as bit 0. |
25 | 0h | RO/V | Intel Trace Hub PFET Enable Ack Status (AGT57_PFET_EN_ACK_STS) Same description as bit 0. |
24:23 | 0h | RO | Reserved |
22 | 0h | RO/V | PCIe Controller F PFET Enable Ack Status (AGT54_PFET_EN_ACK_STS) Same description as bit 0. |
21 | 0h | RO | Reserved |
20 | 0h | RO/V | UFS PFET Enable Ack Status (AGT52_PFET_EN_ACK_STS) Same description as bit 0. |
19 | 0h | RO/V | CNVi-WIFI PFET Enable Ack Status (AGT51_PFET_EN_ACK_STS) Same description as bit 0. |
18:2 | 0h | RO | Reserved |
1 | 0h | RO/V | CSME SRAM PFET Enable Ack Status (AGT33_PFET_EN_ACK_STS) Same description as bit 0. |
0 | 0h | RO/V | CSME-USBr PFET Enable Ack Status (AGT32_PFET_EN_ACK_STS) 0: PFET is turned ON |