Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
XECP SUPP USB2_4 Full Speed (XECP_SUPP_USB2_4) – Offset 8010
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:16 | ch | RO | Protocol Speed ID Mantissa (PSIM) This field defines the mantissa that shall be applied to the PSIE when calculating the maximum bit rate represented by this PSI Dword |
15:9 | 0h | RO | Rsvd0 (RSVD0) Reserved |
8 | 0h | RO | PSI Full Duplex (PFD) If this bit is ‘1’ the link is full-duplex (dual-simplex), and if ‘0’ the link is half-duplex (simplex). |
7:6 | 0h | RO | PSI Type (PLT) This field identifies whether the PSI Dword defines a symmetric or asymmetric bit rate, and if asymmetric, then this field also indicates if this Dword defines the receive or transmit bit rate. Note that the Asymmetric PSI Dwords shall be paired, i.e. an Rx immediately followed by a Tx, and both Dwords shall define the same value for the PSIV. |
5:4 | 2h | RO | Protocol Speed ID Exponent (PSIE) This field defines the base 10 exponent times 3, that shall be applied to the Protocol Speed ID Mantissa when calculating the maximum bit rate represented by this PSI Dword. |
3:0 | 1h | RO | Protocol Speed ID Value (PSIV) If a device is attached that operates at the bit rate defined by this PSI Dword, then the value of this field shall be reported in the Port Speed field of PORTSC register of a compatible port. Note, the PSIV value of ‘0’ is reserved and shall not be defined by a PSI. |