Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Integrated GbE Configuration (D31:F6) Registers
The following registers are at Device 31:Function 6.
Offset | Size (Bytes) | Register Name (Register Symbol) | Scope | Default Value |
---|---|---|---|---|
0h | 4 | GbE Vendor and Device Identification Register (GBE_VID_DID) | Package | XXXX8086h |
4h | 4 | Package | 00100000h | |
8h | 4 | Package | 020000XXh | |
ch | 4 | Cache Line Size Primary Latency Timer & Header Type Register (CLS_PLT_HEADTYP) | Package | 00000000h |
10h | 4 | Package | 00000000h | |
2ch | 4 | Package | 00008086h | |
30h | 4 | Package | 00000000h | |
34h | 4 | Package | 000000C8h | |
3ch | 4 | Interrupt Information & Maximum Latency/Minimum GrantRegister (INTR_MLMG) | Package | 00000100h |
a0h | 4 | Package | 00000000h | |
a4h | 4 | Package | 00000000h | |
a8h | 4 | Package | 00000000h | |
c8h | 4 | Capabilities List and Power Managment Capabilities Register (CLIST1_PMC) | Package | 0023D001h |
cch | 4 | PCI Power Management Control Status & Data Register (PMCS_DR) | Package | 00000000h |
d0h | 4 | Capabilities List 2 & Message Control Register (CLIST2_MCTL) | Package | 0080E005h |
d4h | 4 | Package | 00000000h | |
d8h | 4 | Package | 00000000h | |
dch | 4 | Package | 00000000h |