Intel® Core™ Ultra Processors for H-series and U-series Platforms SOC I/O Registers
Transmitted Modified TS Data 1 Register (TRNSMODTSDATA1) – Offset af4
This is the Transmitted Modified TS Data 1 Register registers. Refer description for each individual field below for more details of the register functionality.
Bit Range | Default | Access | Field Name and Description |
---|---|---|---|
31:16 | 0h | RO/V | Transmitted Modified TS Vendor ID (TRNSMTSVID) If Modified TS Received is Set, this field contains the Modified TS Vendor ID field from the last Modified TS1/TS2 Ordered Set transmitted during the most recent LTSSM State . |
15:3 | 0h | RO/V | Transmitted Modified TS Information 1 (TRNSMTSINFO1) Transmitted Modified TS Information 1- If Modified TS Received is Set, this field contains the Modified TS Information 1 field from the last Modified TS1/TS2 Ordered Set transmitted during the most recent LTSSM State . |
2:0 | 0h | RO/V | Transmitted Modified TS Usage Mode (TRNSMTSUSAGEMD) If Modified TS Received is Set, this field contains the Modified TS Usage field from the last Modified TS1/TS2 Ordered Set transmitted during the most recent LTSSM State . |